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[VHDL-FPGA-Verilog] FFT VHDL

Description: VHDL实现FFT测试文件
Platform: | Size: 28099 | Author: l6xueming@126.com | Hits:

[source in ebook] 256点FFT源代码

Description: 256点FFT IP核。包括16bit和8bit两种精度和C、VHDL、Verilog三种语言的多版本、多精度的IP核
Platform: | Size: 352372 | Author: ykletter@163.com | Hits:

[source in ebook] 512点FFT

Description: 512点FFT IP核。包括C、VHDL和Verilog三种语言版本，8bit与16bit两种精度。
Platform: | Size: 410745 | Author: ykletter@163.com | Hits:

[source in ebook] 1024点FFT

Description:

1024点FFT VHDL程序


Platform: | Size: 438084 | Author: bestsang | Hits:

[VHDL-FPGA-Verilog] 一篇用VHDL实现快速傅立叶变换的论文

Description: 一篇用VHDL实现快速傅立叶变换的论文，包括原理分析和代码实现，印度圣雄甘地大学M.A.学院提供-VHDL with a Fast Fourier Transform papers, including the principle of analysis and implementation of the code, the Mahatma Gandhi Institute of the University of Marat
Platform: | Size: 62464 | Author: | Hits:

[VHDL-FPGA-Verilog] synth_fft_fpga

Description: 用fpga实现fft-achieve fft
Platform: | Size: 62464 | Author: processor | Hits:

[Driver Develop] 16fft

Description: 用VHDL语言编写的FFT程序，有些参考价值哦-VHDL prepared by the FFT procedure, some reference value oh
Platform: | Size: 655360 | Author: 李利 | Hits:

[VHDL-FPGA-Verilog] 2Dfft

Description: VHDL 关于2DFFT设计程序 u scinode1 ∼ scinode9.vhd: Every SCI node RTL vhdl code. The details can be seen in the following section. u 2dfft.vhd: The top module includes these scinodes and form a 3x3 SCI Torus network, and it support these sub-modules scinode1∼ scinode9 reset and clk and global_cnt signals to synchronous the sub-modules to simplify the overall design. u proj2.wfc: VSS simulation result that is the same as the ModelSim simulation result. u Pro2_2.wfc: VSS simulation result of another test pattern can’t cause overflow situation.-VHDL design procedures on 2DFFT u scinode1
Platform: | Size: 783360 | Author: 李成 | Hits:

[VHDL-FPGA-Verilog] youxiufft

Description: 16点的fft程序.非常不错,编译已经实现,还是很好的-16:00 fft the procedure. Very good, compilers have achieved, or good
Platform: | Size: 293888 | Author: 席鹏飞 | Hits:

[Algorithm] jaguar2s

Description: 8-1024可变点数FFT/IFFT变换,VHDL语言设计, 仿真通过,可以很容易综合.-8-1024 points FFT/IFFT transform, VHDL design, simulation, can easily integrated.
Platform: | Size: 274432 | Author: citybus | Hits:

[VHDL-FPGA-Verilog] VHDcf_fft_1024_8

Description: 1024点８位FFT的VHDL语言实现方式，大家可以参考一下。-1024-point FFT eight VHDL way, we can take a look.
Platform: | Size: 12288 | Author: 郭子荣 | Hits:

[VHDL-FPGA-Verilog] fft_debug

Description: 能进行32位浮点数fft运算的VHDL描述。-can float for 32 fft Operational VHDL description.
Platform: | Size: 135168 | Author: liuqifeng | Hits:

[VHDL-FPGA-Verilog] fftmatlab

Description: fft在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-fft in dspbuilder under VHDL source code and test incentives document matl ab model, the simulation under through modelsim
Platform: | Size: 7168 | Author: zqh | Hits:

[VHDL-FPGA-Verilog] 66vhdl_src

Description: 66个vhdl的常用源代码，包括有双向口、状态机等，自解压后看vhdl_example.html列表说明.exe-66 vhdl common source code, including the two-mouth state machine, Since unpacked see vhdl_example.html tabulated. exe
Platform: | Size: 98304 | Author: 刘丙周 | Hits:

[VHDL-FPGA-Verilog] 1024_FFT

Description: 1024点FFT快速傅立叶变换，包含说明文档和VHDL源代码，16位输入/输出，带DMA功能，xilinx的ip-1024-point FFT fast Fourier transform, and includes documentation, VHDL source code, 16 input/output, with DMA function, the ip xilinx
Platform: | Size: 629760 | Author: 刘超 | Hits:

[VHDL-FPGA-Verilog] FFT_CORE

Description: FFT算法的VHDL语言实现 可在Modelsim上运行和调试 -FFT algorithm VHDL in the operation and Modelsim Debugging
Platform: | Size: 29696 | Author: 紫蓝 | Hits:

[VHDL-FPGA-Verilog] diexing

Description: VHDL编写的蝶形变换，可用于FFT变换-VHDL prepared by the butterfly transform, FFT can be used to transform
Platform: | Size: 2048 | Author: same | Hits:

[MiddleWare] fftipcore

Description: 该程序是vhdl语言编写的fft变换的ip核代码，程序中共包含了36个.vhd文件-that the procedure was prepared by the vhdl language fft transform ip nuclear code CPC procedures contained 36. vhd documents
Platform: | Size: 29696 | Author: 袁汇 | Hits:

[Communication-Mobile] cf_fft_2048vhdl

Description: FFT2048点程序VHDL -FFT2048 procedural point procedures VHDL VHDLFFT2048
Platform: | Size: 27648 | Author: | Hits:

[VHDL-FPGA-Verilog] FFTBasedOnFPGALanguage

Description: 此程序用通过PFGA用VHDL语言实现了傅立叶变换，希望对大家有用
Platform: | Size: 615424 | Author: 周健 | Hits:
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